1. Field of the Invention
The present invention relates generally to adjustable speed drive circuitry and methods, and more specifically to multi-level high speed adjustable speed drive circuitry and methods. Even more specifically, the present invention relates to multi-level high speed adjustable speed drive circuitry and methods for driving high-speed medium-voltage motors.
2. Discussion of the Related Art
Centrifugal compressors for natural gas pipeline and processing applications operate at speeds ranging from 5,000 to 20,000 RPM at power levels from 25 to 2 MW, respectively, with the lower speed associated with higher power levels and vice versa. Typically, when these are compressors electrically driven, the motor is a low speed 50 or 60 Hz motor, 3600 RPM maximum, driving through a speed increasing gearbox to the compressor. More recently, there has been a lot of interest in high speed motors that can drive a gas compressor directly, thereby eliminating the gearbox. In either case, an adjustable speed drive (ASD) is usually required to drive the motor, primarily because the load inertia is high and directly starting across the power supply line is difficult, and, secondly, because the ASD permits, in the case of a compressor driven by a motor, the gas flow to be varied without the energy losses associated with throttling the flow. Most ASD solutions commercially available, particularly large Medium Voltage (MV) (voltages between 2.4 kV and 13.8 kV) ones, are designed to work with lower speed motors operating at no more than 50 or 60 Hz. Thus, the control and switching device technology is tailored to meet the needs of this lower speed market segment. In fact, the normal method of synthesizing a sinusoidal voltage with pulse-width modulation (PWM) encounters limitations with conventional three-phase ASDs when the fundamental frequency exceeds 200 Hz because the PWM usually requires that the semiconductor devices switch at nine or more times the fundamental frequency or 1.8 kHz. The problem is made more difficult when (e.g., >1700 V IGBTs) semiconductors of the type required for MV output are employed as they can be limited to as little as 900 Hz switching frequency. (Note: more recently published vendor data on MV drives will show limitations of 120-200 Hz for fundamental frequency.)
A critical requirement for any ASD of this sort is that the harmonic distortion in the motor be kept to a very low level (<<5% THD). This is because the resistance of motor windings increases with the alternating current (AC) frequency and, in the case of a high speed motor design, avoiding losses by minimizing harmonics is a critical requirement for the combination of motor and inverter. FIG. 1 shows the current waveforms described in this prior art having excessive proportion of 5th and 7th harmonic distortion. It is a key objective to eliminate such harmonics to the extent that such a system can be applied to a high-power, high-speed (>3600 RPM) motor in a practical way.